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Sinclair ZX Spectrum DivIDE Plus

Developers Notes

 ZX Spectrum 


Storage Solutions

..PlusD Disk I/F
..ZX Interface 1
..DivIDE I/F

AY Interface

Keyboard Membranes



These notes are intended to assist developers of firmware and emulators to support the latest features of the DivIDE Plus Hard disk interface (also known informally as the DiwIDE) for the Sinclair ZX Spectrum. If you require any more specific details, then please do not hesitate to contact us directly.

The notes were last updated on 3rd April 2007 and represent the version which has gone into production.

Designing for the DivIDE Plus Through Connector

Although the DivIDE Plus is provided with a through connector, this will not allow you to use any equipment which expects to page its ROM into the Spectrum's memory.  The DivIDE Plus does this by forcing /MREQ=1 on the through connector, so anything connected will not get a paging-in state.  However, this does have the advantage that you can connect hardware which would normally page into the Spectrum's memory without any hardware modifications.  Instead, the firmware needs to be amended in order to control the connected hardware directly - this is what we intend doing with the +divIDE firmware in order to control the PlusD printer port and floppy disk drives.

Implementation of the 128K BASIC Mode on DivIDE Plus

The ZX Spectrum 128K has two ROM banks: ROM0 and ROM1. ROM1 is the basic one, used in BASIC48. ROM0 has menu, calculator, screen editor and extra functions specific to the 128K Spectrum (AY commands etc). The Original DivIDE Hard Disk Interface will cause a ZX Spectrum to crash whilst in 128K BASIC Mode (ROM0) - this appears to be due to a clash between the DivIDE TR-DOS traps #3D00...#3DFF and the ZX Spectrum's ROM0 code. 

DivIDE Plus therefore addresses this problem by implementing its own latch (known as the B4 Latch) on the 4th bit of Port &7FFD (decoded A15, A14, A1, /IORQ, /WR), keeping the /M1 line coming from the Z80CPU high when ROM0 is selected (this disables the autopaging of the DivIDE). This provides support for the ZX Spectrum's 128K BASIC Mode, by ensuring that DivIDE Plus is not active when ROM0 is selected. 

The B4 Latch is unaffected by the ZX Spectrum +3's OUT commands such as #0FFD, #1FFD, #2FFD, #3FFD and is also not affected by an IN such as on the internal Port &7FFD on the ZX Spectrum 128K.

However, the use of the B4 Latch to lock the /M1 line can lead to incompatibility with some 128K snapshots and the DivIDE Plus therefore defaults to traps being enabled in both ROM0 and ROM1 (as per the original DivIDE). 

ROM1 is used by most software, as it contains the maths and tape routines, character set, code to read the keyboard and many more standard system calls. On the other hand ROM0 differs a lot between the various 128K models (for example there are differences between Sinclair 128K and Amstrad +2 starting at address #0562).  Generally a 128K snapshot created with different ROM0 code will work on other Spectrums, provided it does not call any routines contained within ROM0.

In order to enable this 128K Mode, the traps can be disabled in ROM0, by sending OUT 23, BIN 001xxxxx.

With 128K Mode enabled, there is a software solution to loading 128K snapshots which access ROM0 on DivIDE Plus.  In order to implement this, a fix is required to the firmware:

1. On the stack place BC then a pointer to the following commands OUT (C),B:POP BC:RET also placed on the stack below (8 bytes total).

 ------------- ------------- ------------- ------------- ------------
| OUT (C),B | POP BC: RET | code | BC | jump |
------------- ------------- ------------- ------------- ------------
^code ^SP ^original SP
2. Now set BC to #4xFD (x is the proper RAM bank), SP to the address of the stacked code address and jump to the DivIDE exit area. The RAM bank must be set before this call, as we only change the ROM bank here.

This will first jump to OUT, change the ROM bank, restore BC and return to the main program.

Implementation of greater ROM/RAM space on DiviDE Plus

DivIDE Plus provides a total of 512K ROM and 512K RAM on the DivIDE Plus in order to enable much improved firmware to be written (this compares to the 8K ROM and 32K RAM available on the original DivIDE Hard Disk Interface). 

We decided on 512K as this would allow ramdisk storage and the following additional firmware to be used (as well as the original divIDE firmware):

CPM22QED MBD (CP/M compatible)

The DivIDE Plus interface is equipped with 512K SRAM (628512 SMD soldered) and 512K ROM (29F040 PLCC in a socket) with address and data lines corrected, so no dedicated .RAW files are needed to program firmware on another system. The RAM is battery backed.

The scheme chosen mixes MB-02 paging using the Port &17 with DivIDE paging using the &E3 Port. It is compatible with the original 8K firmware without amendment.  You will however, need to obtain the ROM reprogramming software from ourselves, rather than use that provided for the original DivIDE, due to different procedures for programming the 29F040 chip than on the 28C64 used by the original DivIDE.

The &E3 Port is untouched. The &17 Port is 8bit, outputs are called Q0..Q7, as follows:

- Q6 and Q7 select the mode (DivIDE, RAM, ROM, reset).
- Q5 bit must be set (1) to enable writing in RAM and ROM modes.  If this is set to 0, it disables the ability to write to RAM or ROM.
- Q0..Q4 select the memory banks.

How the DivIDE Modes Operate

At power up, Ports &E3, &17 and &7FFD (internal) are all zeroed.  Bit 4 of Port &7FFD (B4 Latch) is set whilst the ZX Spectrum has ROM0 selected - this is to force the DivIDE ROM and traps to act on power-on, even when the ZX Spectrum wakes up with ROM0.

If you press the Spectrum's reset button, it is slightly different.  Only Ports &17 and &7FFD (internal) are zeroed.  Bit 4 of &7FFD (B4 Latch) is unchanged.

When the DivIDE is reset using software (ie. Port &17 is sent Q7=1,Q6=1), Port &E3, &17 and Internal &7FFD are all zeroed. Again bit 4 of Port &7FFD is cleared.

This means that at this stage, DivIDE Mode is selected and the code stored in offsets #06000..#07FFF in the 29F040 ROM is used to boot the computer.

DivIDE Mode (Send %000aaaax to Port  &17)

This is the standard DivIDE Compatibility mode with all divIDE traps enabled, provided that the Spectrum is using ROM1 or bit 4 of Port &7FFD (B4 Latch) is set by power-on.

Bit Q5 (%x) and bit Q0 (%x) are both unused in this mode (should be set to 0).

Bits Q1..Q4 (%aaaa) select the ROM/RAM area for DivIDE operation - providing 16 separate areas of 32K ROM + 32K RAM - allowing you to select the firmware to be loaded from BASIC.

Each area consists of a set of 4 x 8K ROM banks (ROMa0, ROMa1, ROMa2, and ROMa3) and 4 x 8K RAM banks (RAMa0, RAMa1, RAMa2, and RAMa3).  Although you can access all 4 RAM banks, you can only address ROMa3.  This enables you to install standard DivIDE firmware in ROMa3.

In MAPRAM mode (selected by Port &E3 as on the original DivIDE), RAMa3 is used as a replacement for ROMa3.  You can still access the other 3 RAM banks (RAMa0, RAMa1 and RAMa2 as memory), however, RAMa3 is write protected. You cannot access the ROMa3 bank until you either turn the ZX Spectrum off and back on, or issue a Reset Command to Port &17 (pressing the Spectrum's reset button will have no effect as it does not zero Port &E3). 

DivIDE Plus 128K Mode (Send %001xxxxx to Port  &17)

This enables the 128K BASIC Mode - see above.  Only Bit Q5 is required to be set to 1 - all other bits (Q0...Q4) are ignored.

RAM Mode (Send %01waaaaa to Port  &17)

This enables you to replace the ZX Spectrum ROM with the selected RAM page.  All of the DivIDE traps are inactive, although you can continue to use IDE commands and Port &E3 (changes to Port &E3 will only take effect when DivIDE mode is selected, by Port &17 or reset button).

Bit Q5 (%w) can be set to provide a 64K RAM mode, allowing you to run software that requires 64K RAM in the Z80CPU address space (e.g. CP/M). If it is zero, then the RAM is write-protected.

Bits Q0..Q4 (%aaaaa) selects the RAM page to be used in place of the ZX Spectrum ROM - providing 32 separate pages of 16K.

ROM Mode (Send %10waaaaa to Port  &17)

This enables you to replace the ZX Spectrum ROM with the selected ROM page.  All of the DivIDE traps are inactive, although you can continue to use IDE commands and Port &E3.

Bit Q5 (%w) can be set to allow you to re-program the 29F040 Flash EEPROM chip.  Please note that there is a special algorithm required to re-program this chip, therefore special software will need to be developed.

Bits Q0..Q4 (%aaaaa) selects the ROM page to be used in place of the ZX Spectrum ROM - providing 32 separate pages of 16K.

Reset Mode (Send %11xxxxxx to Port  &17)

This resets divIDE Plus (during the next ROM access or the refresh cycle if I register is range 0..63).  All other bits are ignored.

Port &17, Port &E3 and internal Port &7FFD are all zeroed. However bit 4 of Port &7FFD (B4 Latch) remains unchanged.

This will then force the ZX Spectrum to restart - if ROM1 was selected at the time, then the DivIDE Plus will restart in DivIDE Mode (as if you had just turned on the Spectrum).  However, if ROM0 was selected at the time, you will just be presented with the Spectrum 128 selection menu (Tape Loader, 128 BASIC, Calculator, 48 BASIC) as DivIDE Plus will be disabled.

The Spectrum's 128K banking latch lock (bit 5 of &7FFD Port) can be cleared in software by the reset instruction on Port &17, allowing you to test for ZX Spectrum +3 features (namely the floppy disk) to see if they exist.  However be warned that on a standard ZX Spectrum 128K these OUT commands can crash the computer, as they go to Port &7FFD!